#3 EDA · Calibre signoff

Siemens EDA

#3 in EDA share (~13%). Built on Mentor Graphics (acquired by Siemens 2017, $4.5B). Its Calibre physical-verification (DRC/LVS) signoff is the de-facto standard specified by TSMC, Samsung and Intel (85%+ share), so every advanced chip passes through it regardless of overall rank. Tessent (DFT) and Questa (verification) are also strong. Part of Siemens Digital Industries Software (not separately listed).

Updated Jun 21, 2026

Siemens EDA~13% of EDA
Money outR&D·엔지니어 인건비 (비공개)클라우드·컴퓨팅 인프라 (비공개)

Financials & Segments

  • Total revenue · ~13% of EDA (#3)
  • Customer concentration · Calibre signoff 85%+; all foundries and designers.
  • Segments · Calibre signoff · Tessent DFT · Questa verification

Revenue from

  • TSMC High confidence
    Supplies EDA tools to tsmc.
    Confirms EN SemiWiki Published Jun 1, 2025: "tsmc specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "tsmc specifies and licenses Calibre physical verification for tape-out signoff."
  • Samsung Electronics High confidence
    Supplies EDA tools to samsung-electronics.
    Confirms EN SemiWiki Published Jun 1, 2025: "samsung-electronics specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "samsung-electronics specifies and licenses Calibre physical verification for tape-out signoff."
  • Intel High confidence
    Supplies EDA tools to intel.
    Confirms EN SemiWiki Published Jun 1, 2025: "intel specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "intel specifies and licenses Calibre physical verification for tape-out signoff."
  • SMIC Medium confidence
    Supplies EDA tools to smic.
    Confirms EN SemiWiki Published Jun 1, 2025: "smic specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "smic specifies and licenses Calibre physical verification for tape-out signoff."
  • MediaTek Medium confidence
    Supplies EDA tools to mediatek.
    Confirms KO Wikipedia Published Jan 1, 2026: "mediatek designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "mediatek designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • United Microelectronics (UMC) Medium confidence
    Supplies EDA tools to umc.
    Confirms EN SemiWiki Published Jun 1, 2025: "umc specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "umc specifies and licenses Calibre physical verification for tape-out signoff."
  • Qualcomm Medium confidence
    Supplies EDA tools to qualcomm.
    Confirms KO Wikipedia Published Jan 1, 2026: "qualcomm designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "qualcomm designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • NVIDIA Medium confidence
    Supplies EDA tools to nvidia.
    Confirms KO Wikipedia Published Jan 1, 2026: "nvidia designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "nvidia designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • Marvell Medium confidence
    Supplies EDA tools to marvell.
    Confirms KO Wikipedia Published Jan 1, 2026: "marvell designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "marvell designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • AMD Medium confidence
    Supplies EDA tools to amd.
    Confirms KO Wikipedia Published Jan 1, 2026: "amd designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "amd designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • Apple Medium confidence
    Supplies EDA tools to apple.
    Confirms KO Wikipedia Published Jan 1, 2026: "apple designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "apple designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • GlobalFoundries Medium confidence
    Supplies EDA tools to globalfoundries.
    Confirms EN SemiWiki Published Jun 1, 2025: "globalfoundries specifies and licenses Calibre physical verification for tape-out signoff."
    Confirms EN Siemens Published Jan 1, 2025: "globalfoundries specifies and licenses Calibre physical verification for tape-out signoff."
  • Broadcom Medium confidence
    Supplies EDA tools to broadcom.
    Confirms KO Wikipedia Published Jan 1, 2026: "broadcom designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "broadcom designs chips on Siemens EDA (Calibre/Tessent/Questa)."
  • Arm Holdings Medium confidence
    Supplies EDA tools to arm.
    Confirms KO Wikipedia Published Jan 1, 2026: "arm designs chips on Siemens EDA (Calibre/Tessent/Questa)."
    Confirms EN SemiWiki Published Jun 1, 2025: "arm designs chips on Siemens EDA (Calibre/Tessent/Questa)."

Pays to

  • R&D·엔지니어 인건비 (비공개) Medium confidence
    EDA cost base is mostly R&D engineers.
    Confirms EN SemiWiki Published Jun 1, 2025: "EDA cost is mostly senior software engineers."
  • 클라우드·컴퓨팅 인프라 (비공개) Low confidence
    Cloud EDA/verification compute infrastructure (undisclosed).
    Confirms EN SemiWiki Published Jun 1, 2025: "Cloud-based EDA/verification raises compute-infrastructure cost."

Value-chain ripple (tiers 2–3)

Following node-to-node links up to 3 tiers; each firm is shown once, at its nearest tier.

CompanyChain'21'22'23'24'25YTD
SK hynixlead3-0.4-25.6+53.9+48.6+361.1+204.7
Samsung Electronicslead3-9-14.2+20.9-26.4+212.9+121
CoreWeavelead3·····+64.7
Arista Networkslead3+97.9-15.6+94.1+87.7+18.5+29.5
Foxconn (Hon Hai)lead3-5.1+2.8+7.8+80.1+26.9+21.8
Alphabet (Google)lead3+65.3-39.1+58.3+35.8+66.1+17.8
Amazonlead3+2.4-49.6+80.9+44.4+5.2+5.9
Super Microlead3+38.8+86.8+246.2+7.2-4+4.7
Meta Platformslead3+23.1-64.2+194.1+65.9+13.1-12.3
Microsoftlead3+52.5-28+58.2+12.9+15.6-21.2
Marvelllead2+84.9-57.5+63.7+83.8-22.8+265.9
Intellead2+6.1-46.6+94.6-59.6+84+263.1
MediaTeklead2+27.8-26.6+49+59.1+25.1+154.3
AMDlead2+56.9-55+127.6-18.1+77.3+150.9
Astera Labslead2····+25.6+150.7
Credo Technologylead2··+46.3+245.2+114.1+88.9
Texas Instrumentslead2+17.5-9.9+6.4+13.1-4.5+88.3
Global Unichiplead2+21.4+67.6+99.4-13.7+101.4+86.3
Renesas Electronicslead2+8.2+2.4+88-13.6+23.8+83.8
NXP Semiconductorslead2+44.8-29.4+48.4-8+6.4+45.7
Alchip Technologieslead2+14.3-8.7+365.1-18.9+0.8+40.2
Qualcommlead2+22.3-38.4+35.1+7.7+13.9+34.2
Broadcomlead2+56.8-13.4+104.9+110.9+50.7+19.3
NVIDIAlead2+125.5-50.3+239+171.3+38.9+13.1
Applelead2+34.6-26.4+49+30.7+9.1+9.8
Sony Semiconductor Solutionslead2+27.2-8.4+27.8+17.9+1-8.7
Arm Holdingslead1···+64.2-11.4+302
United Microelectronics (UMC)lead1+43.2-40.3+39.2-19+28.8+206.4
GlobalFoundrieslead1·-17.1+12.5-29.2-18.6+145.8
TSMClead1+12.1-36.8+42.5+92.9+56+53.3
SMIClead1-29.6-7.4-18.3+169.9+98.4+1.5
Siemens EDAnode······

Siemens EDA is not separately listed (part of Siemens), so it has no standalone stock return, but with Synopsys and Cadence it is the third pillar of the EDA oligopoly. Its Calibre physical verification is the de-facto tape-out signoff standard at TSMC, Samsung and Intel (85%+), so every advanced chip must pass through it regardless of its #3 overall share. It cannot be validated via returns directly, but its subscription/essential-good structure, insensitive to the cycle, matches the Synopsys and Cadence share-price pattern.


← All companiesMarkdown · JSON

For information only, not investment advice. Data is refined from public sources and may contain errors.

ValueChain.wikiCompany value-chain data